HP3000-L Archives

March 1999, Week 2

HP3000-L@RAVEN.UTC.EDU

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Peter Chong Sr. Systems Analyst (MRP/ERP)" <[log in to unmask]>
Reply To:
Peter Chong Sr. Systems Analyst (MRP/ERP)
Date:
Wed, 10 Mar 1999 10:41:48 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (26 lines)
 HP Unveils PA-8600 Chip Details
March 9, 1999 11:00 AM EST


CHICAGO--(BUSINESS WIRE)--March 9, 1999--Here at a meeting of InterWorks, a
user group for HP enterprise computing, Hewlett-Packard Company today
announced that its upcoming PA-8600 processor will feature new technologies
that will enable advances in performance and high availability. The PA-8600
will be ideal for data-intensive applications such as Internet e-commerce,
data warehousing, transaction processing and Computer Aided Design (CAD).

Originally planned for release in mid-2000, the PA-8600 now is expected to
ship in systems (at frequencies from 500MHz to 550MHz) by the first quarter
of 2000. Performance features will include new cache algorithms to enable
faster access to data, and cache prefetch technology to load data from
memory faster. High-availability features include error checking and
correcting (ECC) on the 1.5MB of on-chip cache to improve real-time error
correction. The PA-8600 will be enhanced further by the addition of lockstep
capability, a technology that enhances high availability by enabling systems
to compare processing steps and recover if errors are detected.

The PA-8600, based on the award-winning PA-8500 core, will be used in HP's
enterprise-class workstations and servers.

------------------------------------------

ATOM RSS1 RSS2