HP3000-L Archives

March 1999, Week 2

HP3000-L@RAVEN.UTC.EDU

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Stan Sieler <[log in to unmask]>
Reply To:
Stan Sieler <[log in to unmask]>
Date:
Thu, 11 Mar 1999 12:07:29 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (27 lines)
Gavin writes:

> From the end-user's point of view, how MPE gets on to IA-64, and
> how it executes is largely irrelevant.

In some respects, yes.  OTOH, look at HP-UX ... it just *barely* runs on
PA-RISC architecture, with little or no attempt to offer users the
advantages that PA-RISC gives them over running on, say, a VAX.  (Unlike
MPE XL, which provided access to the wider addressing space since day one.)

So...I can see that it might happen that MPE (or HP-UX, for that matter!)
might be ported to IA-64 in a manner that doesn't give us access to all
the hardware features of the new machine.  For example, if IA-64 includes
x86 instruction set support of some kind...will we be able to access
that from MPE?  From HP-UX?  From Linux?   Or only from NT?

> Oh, and as for HP developing a new architecture without having to give
> any credit to Intel, I'm afraid I have bad news for you.  Guess who's
> actually manufacturing all these hot new PA-RISC chips.

Hitachi?  :)

(I know, Intel ... but are they the sole source?)

--
Stan (got an old Hitachi PA-RISC chip on the bookshelf behind me) Sieler

ATOM RSS1 RSS2