Goetz Neumann writes:
>Mark Bixby wrote:
>>
>> How about creating a virtual 908 machine by writing a PA-RISC instruction
set
>> emulator that would run on Wintel hardware?  A high-end Wintel machine might
>> yield acceptable performance for low-end MPE development purposes.
>>
>I thought along that lines when I read about the 'Virtual PC' product
>from Connectix for PowerPC Macs.
>I have no experience with "Virtual Machines", but it appears to me that
>emulating the PA-RISC IO subsystem might be the toughest piece.

Connectix's _Virtual PC_ is a dynamic-recompilation emulator together
with a complete emulation of the standard PC BIOS and I/O system. In
fact, there are a number of x86 instruction set emulators, including the
ones by Microsoft for Alpha, MIPS and PowerPC. A company called Insignia
Solutions currently markets an interpretive emulator for x86 that runs
Windows 95. I've used it; it's about as fast as a 66MHz 486 when hosted
on a 180MHz PowerPC 604e. Connectix's product is expected to be much
faster.

Emulating a CISC instruction set on a RISC machine can be done very
efficiently: the CISC processor is also an emulator, since the CISC
processor core is running an emulator written as microcode. This means
that the normal state of affairs is to use several cycles for instruction
decoding, and several more for execution. A lot of the silicon on Pentium
and later processors is devoted to implementing clever ways around this.

Going the other way is much less efficient: a RISC emulator on a CISC
machine uses several cycles to decode each of its own instructions, and
it will take several of these instructions to decode the RISC
instruction. Once decoded, the emulator will then take several more
multi-cycle instructions to execute the RISC instruction. So where the
CISC emulator on the RISC machine may match the original CISC processor
core cycle for cycle (though usually it doesn't quite manage that level
of efficiency), the CISC processor running an emulator has to spend many
cycles to do what the RISC processor can do in just one. In addition,
decoding PA-RISC or PowerPC instructions is very difficult to do in
software. About the only thing that can save this situation is static or
dynamic recompilation, and even that removes only the decoding overhead,
not the increased execution time.

And, as Goetz mentions, the documentation for the IBM PC I/O system is
much more readily available than documentation on the 3000/9000 I/O
system :-).

-- Bruce