Subject: | |
From: | |
Reply To: | Shahan, Ray |
Date: | Mon, 22 Oct 2001 16:13:41 -0500 |
Content-Type: | text/plain |
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Hi all,
I have a question on RL vs. XL.
Given an outer block A that calls subprog E as well as 3 sub-progs B, C, and
D, and subprogs B, C and D also call subprog E, is there really any
measurable speed benefit to making E an RL vs. leaving it an XL? It seems
that once the module, E, from the XL is mapped into memory, it should be as
quick as the RL that was compiled into A, B, C and D...even though the
manual states otherwise?
Anyone?
Thanks in advance.
Ray Shahan
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