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September 1997, Week 3

HP3000-L@RAVEN.UTC.EDU

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From:
Wirt Atmar <[log in to unmask]>
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Date:
Thu, 18 Sep 1997 01:28:12 -0400
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I earlier wrote:

> Intel released the following news release today. What they've done is
create
>  a memory chip that now has two distinct graded levels -- and thus more
than
>  one bit per memory cell. The new chips are trinary [that is, three states
>  exist in cell (which is most likely a capacitor/field-effect transistor
>  combination) instead of the usual two states that lead to a binary
>  representation].

In order to keep misinformation to a minimum, let me correct what I said. I
had the impression from earlier reports that the chip only had three states
(off, half on, and full on). In that I erred. The NY Times reports that four
states exist in the chip (off, 1/3 on, 2/3 on, full on). That actually makes
a great deal more sense -- and is much easier to map into a linear binary
word. The NY Times writes:

"But the new multilevel flash memory technology is able to go beyond "empty"
and "full" readings, to also sense whether the glass is two-thirds full or
one-third full. Those four distinct states yield the equivalent of two bits
of data. And Intel engineers predict that even subtler gradations may soon be
possible, yielding even more bits with each transistor."

Wirt Atmar

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