Gilles wrote:
> I believe all 930 customers were offered free upgrades to the 950.

Quietly, yes :-)

> The 930 was architecturally quite different from any other PA machine,
> and really considered to be almost a prototype.

The HP3000/930, and it's HP-UX counterpart the HP9000/840, had a CPU built
out of discrete AS family TTL chips rather than microprocessor technology.
This CPU was almost certainly intended only as a prototype, but probably
became productized due to delays in the development of the microprocessor
versions of the CPU.  Later delays in the development of the new MPE/XL
operating system were long enough that the hardware people seem to have
been able to catch up, as the 950 shipped not long after the 930.

Due to its "prototype" nature and the limits on complexity imposed by
trying to build a new pipelined RISC architecture out of a finite number
of discreet TTL ICs rather than a few custom microprocessor chips, the
930 CPU had some interesting low level performance "features".  The HP
Journal article on the 930/840 CPU is interesting reading if you're
interested in now CPUs work.

The CPU consisted of five boards full of chips, and because the internals
of the CPU were thus exposed, these machines remained valuable for many
years due to their ability to run various low level hardware tracing tools.
The last time I was at the Mountain View Response Center, there was still
a 930/840 in use there (though this was a few years ago).

The 930/840 were code named "Indigo", and were superseded by the 950/850
"Cheetah" systems which were the first to use a microprocessor implementation
of "HP Precision Architecture" (now called PA-RISC).  The 950 was a box
swap upgrade from the 930.

The 930 CPU ran at a whopping 8MHz, which was pretty good considering that
a series 70 was something like 1 or 2Mhz I believe.  The 950 ran at 13.7Mhz,
plus it had the benefit of being able to eliminate most of the limitations
of the 930 CPU logic and so achieved a slightly better than linear-with-
clockrate performance improvement.

The CM Emulator achieves something like one CM instruction executed every
6-7 PA-RISC clock cycles on average, so at first release the 930 and 950
didn't run faster than a series 70 running MPE/V since much of MPE/XL was
still running in CM, and the new NM parts of the OS were as yet unoptimized
for real-world environments.  The 950 (and to some degree the 930) did
see some very impressive batch performance relative to MPE/V due to
things like their much larger memory (24 and 32MB standard for the 930 and
950 respectively IIRC) and the single threaded nature of most batch jobs
which isn't dependent on an efficient dispatching algorithm, etc.

Later CPUs in the 950 box (955, 960, 980) introduced significantly faster
CPUs, but retained the original 950's memory subsystem that was designed
to run with a 13.7Mhz CPU.  This means that on a 980 you may have a fast
CPU, but it spends much of its time twiddling its virtual thumbs waiting
for data to arrive from main memory (making cache locality a more critical
performance factor for these machines).

G.