Gavin writes:

>So if an operation/event occurs in the center of the chip's 0.5 x 0.5cm
>die, you'll have to wait 2-3 clock cycles before the information can
>possibly propagate to the edge of the die at the speed of light.

Correct. Actually, the transit time by itself isn't the most interesting
design challenge; various parallel processor architectures have provided
some solutions to the "can't see the edge" problem. But a 250 GHz clock
pulse has a wavelength of just over 1 mm. That means that different parts
of the chip are in completely different states relative to the clock
phase. It also means that interconnects have to be designed very
carefully, since a  distribution line longer than about 0.2 mm begins to
look like an inductance or capacitance. Of course, one could make use of
that property.

The referenced article discusses how some of these challenges are being
addressed, and provides links to more detailed information. As a
practical matter, the "speed bump" associated with getting on and off a
250 GHz chip would mean that these would be used for functional units
rather than complete general-purpose processors.

>Cool.

Unfortunately, with present-day superconductors, there's not much choice.

-- Bruce


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